Somewhere inside the southbridge of most modern machines, are two UARTs which take parallel data from the computer's bus, and sequence it serially to a TX pin on the device's package. In order to keep each byte separate, PC style UARTs frame each eight bits of data with a single start and stop bit ( other configs are possible). The start bit, the eight data bits, and the stop bit, together form the 'protocol' of asynchronous serial communications. In the context of the OSI model, this is roughly layer 2.
As it turns out, the southbridges of most modern machines signal at 3.3v. Further, these delicate devices have very little drive strength. For these reasons, the signal coming out of the southbridge would not carry over any useful distance through a serial cable.
To address this problem, the UART output goes to an RS-232 driver chip. This IC has greater drive strength, and may swing from -15v to 15v (+/- 12 is more common). This is the PHY or layer 1 of RS-232 asynchronous serial.
When Bob Metcalf introduced Ethernet at Xerox Parc, he wasn't really interested in PHY technology. His major contribution was a technique (CSMA/CD) to share a common wire among many machines. The data itself was simply Manchester encoded on to a thick piece of coaxial cable (the Ethernet). In those days, the majority of work involved in an Ethernet controller, was in, well, the controller.
A funny thing has happened as Ethernet has gotten faster. With the introduction of the Ethernet switch, we are no longer sharing a common wire at all. In a switched, full duplex environment, Metcalf's CSMA/CD protocol isn't even used.
At the same time, the amount of work required to push ever more bits, through less expensive cable (UTP), has increased dramatically. Rather than simply Manchester encoding the data, gigabit Ethernet PHYs are really more like phone modems, modulating and demodulating the data in sophisticated ways. Unlike POTS or DSL modems however, gigabit Ethernet PHYs must have DSPs capable of processing at very high frequencies. The only common application that requires signal processing at these rates, is the read channel of a modern hard drive.
It should be no surprise then, that one of the dominant players in the gigabit PHY market, has no history with Ethernet at all. Marvell had been supplying read channel ICs to HD manufacturers for years, before deciding to apply their expertise to 1000base-T (the Galileo acquisition came later).
Because the mixed signal, DSP expertise required to field a competitive gigabit PHY is so different from that required to build a PCI Ethernet MAC, the landscape has really shifted between fast and gigabit Ethernet.
For example, to my knowledge, there is not a single Asian supplier of 1000base-T PHYs, despite their dominance in the fast Ethernet market. I suspect that companies like Realtek, VIA, and Davicom will soon be licensing gigabit PHYs from Texas' Cicada, Ireland's Massana, or Israel's Mysticom.
There are real differences between modern PHY implementations. For example, the standard requires support over 100 meters of cat 5e cable. The best modern gigabit PHYs however, are capable of more than 100 meters, over traditional cat 5 cabling. There are also significant differences in power consumption between manufacturers.
For a deeper understanding of 1000base-T PHYs, you may want to do some googling, or even consult the IEEE standard.
